This application relates to the process of fabricating a semiconductor device. More particularly, the invention relates to a mask that effectively corrects optical proximity effects when an image feature is formed on an image surface during semiconductor fabrication.
In the manufacture of semiconductor devices, many photolithographic process steps are involved to define and create the image feature of circuit elements or layouts onto a substrate layer. Conventional photolithography process is performed using a mask having opaque and transparent regions that causes light to fall on photosensitive material in a desired pattern. After light is shone through the mask onto the photosensitive material, the photosensitive material is then developed leaving the printed image of the circuit and/or component of the substrate layer. The image substrate is subsequently processed with techniques such as etching, deposition and doping to alter the substrate layer with the transferred pattern. As the feature size continues to decrease to approach the resolution of the fabrication process, circuit designers are forced to deal with proximity effect problems that arise as a consequence of the optical lithographic process.
One problem that arises from the optical photolithography process includes “line end shortening” that results in the shortening or “pull-back” of the line ends in the printed image. In order to compensate for line end shortening, the circuit designers often add additional features, such as hammer heads 10 shown in FIG. 1 onto the line ends 1 before carrying out the photolithographic process. These hammer heads 10 can effectively compensate by optical proximity correction (OPC) for the problem of line end shortening in some situations. However, if these hammer heads 10 are arranged too close to each other, a pattern bridging problem can potentially be created in the printed image as illustrated in FIG. 1. The prior art describes a system to control line-end shortening arising from optical effects by using double exposure. The system includes defining an unexposed line on the photoresist layer using a first mask and exposing the photoresist layer through the first mask. The system also requires a second mask for defining an exposure region and a second exposure that cut through the unexposed line on the photoresist layer, so as to resolve the pattern bridging problem and create two opposing line ends on opposite sides of the exposure region. Other additional features, such as scattering bars may also be placed adjacent to the line ends to control line end shortening problem.
“Line corner rounding” is the degree to which feature corners that should be at sharp angles are instead rounded by the lithography process. In some cases, the line corner rounding may lead to pattern bridging problem. The line corner rounding may also result in a decreased tolerance for overlay shift in the double patterning methods. The line corner rounding may be corrected by adding serifs to outside corners, which are called positive serifs, and subtracting serifs from the inside corners, which are called negative serifs, to the feature in the photomask. This is shown in FIG. 2, in which the positive serif 193 has been added to the outside corner of the feature 171, and the negative serif 197 has been removed from the inside corner of the feature 171.
In the semiconductor fabrication which involves double patterning technique (DPT), a patterned feature may be produced by two consecutive exposures via either one mask or two different masks. It is also important to maintain the accuracy of pattern shape produced by double exposure in order to avoid short form pattern overlay. Therefore, there is a need to provide a mask design which effectively control line end shortening and corner rounding arising from proximity effects to achieve desired pattern accuracy and gain more process window.